The semiconductor industry has progressed into nanometer technology process nodes in pursuit of higher device density, higher performance, and lower costs. As this progression takes place, challenges from both fabrication and design issues have resulted in the development of three-dimensional designs, such as fin-like field effect transistor (FinFET) device. A typical FinFET device is fabricated with a thin “fin” (or fin-like structure) extending from a substrate. The fin usually includes silicon and forms the body of the transistor device. The channel of the transistor is formed in this vertical fin. A gate is provided over (e.g., wrapping around) the fin. This type of gate allows greater control of the channel. Other advantages of FinFET devices include reduced short channel effect and higher current flow.
However, it may be difficult to form a fin structure that is substantially free of defects using conventional implant methods. In many conventional FinFET devices, a twin-like defect may appear on a top of the fin structure. A hot implant process may be utilized to remove the twin-like defect. Unfortunately, the hot implant process may induce other unique defects in fin structures such as cluster defects, especially if the hot implant process is applied in low dosage situations. The hot implant process may also cause the thermal budget to be exceeded.
Therefore, while existing methods of fabricating FinFET devices have been generally adequate for their intended purposes, they have not been entirely satisfactory in every aspect.